Xilinx FPGA Implementation of Arithmetic Logic Shift Unit (ALSU) .

Authors

• Raghad Z. Tawfeeq, Control & Systems Engineering/University of Technology Baghdad, Iraq

Document Type

Original Study

Abstract

A Field Programmable Gate Array (FPGA) is a digital integrated circuit that can be programmed to do any type of digital function. This paper represents how to map the arithmetic logic shift unit (ALSU) to the Xilinx FPGA Chip. The ALSU the VHDL hardware architecture was captured through the use of description language. Xilinx Integrated Software Environment ISE 6.i (project navigator) CAD software package was used to synthesize and implement the architecture of the ALSU to the FPGA chip. The architecture was functionally and performance validated through the package software simulation via post-synthesis and post-implementation software simulations.

How to Cite This Article

Tawfeeq, Raghad Z. (2006) "Xilinx FPGA Implementation of Arithmetic Logic Shift Unit (ALSU) .," Iraqi Journal of Computers, Communications, Control and Systems Engineering: Vol. 6: Iss. 3, Article 9.
Available at: https://ijccce.researchcommons.org/journal/vol6/iss3/9